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 AWT921
900 MHz Integrated Power Amp
Data Sheet - Rev 2.0
FEATURES
* * * * * * High Power Levels High Efficiency True Surface Mount Package With Integrated Heat Slug Internal Bias Circuit Requiring Nominal Input Voltages +10% Low Cost Off Chip Output Matching Circuit Allows Application Optimization
APPLICATIONS
* * * Base Station Driver Amplifier u-Cell Base Station Output Stage Cellular Booster Amplifier
S11 SSOP-28 28 Pin Wide Body w/ Heat Slug
PRODUCT DESCRIPTION
The AWT921 is a monolithic amplifier for use in communication systems that require high gain and output intercept point. This device has been specifically designed for multi-carrier and micro-cell base station applications. This device is
Vd1 Vd2
manufactured on a high power MESFET process and has an on-chip bias circuit that does not require highly regulated positive and negative supplies to establish the proper operating point.
Vd3
Bypass
Bypass
Bypass
RFC
RFC
RFC
RFin
RFout M1 M2 M3
Bias Network Vss On Chip Rref
Vg3
Vg1
Vg2
Vref
Vdd
Figure 1: Block Diagram
09/2003
AWT921
Figure 2: Pinout (X-Ray Top View)
Table 1: Pin Description
PIN 1,14,15 28, slug 2 3 4 5,6 7,8 9,10 11 12 13 16,17 18-25 26,27 NAME GND VGS1 V DD RFIN V D1 GND V D2 VREF V SS VGS2 VGS3 V D3 N/C DESCRIPTION AC and RF Ground First Stage Gate Terminal Positive Supply of Bias Circuit RF Input First Stage Drain Supply First Stage Source Ground Second Stage Drain Supply Bias Control Pin Negative Supply for Bias Circuit Second Stage Gate Terminal Third Stage Gate Terminal Third stage Drain Supply & RFOUT Not Connected
2
Data Sheet - Rev 2.0 09/2003
AWT921
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER V DD RFIN 1st Stage Supply (VD1) 2nd Stage Supply (VD2) 3rd Stage Voltage (VD3) Negative Supply (VSS) Reference Voltage (VREF) Storage Temperature Operating Temperature
MIN 0 0 0 0 0 -7 0 -55 -30
MAX +7 +20 +10 +10 +10 0 +7 +100 +85
UNIT V DC dB m V DC V DC V DC V DC V DC C C
Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability.
Table 3: Operating Ranges PARAMETER Operating Frequency RFIN 1st Stage Supply (VD1) 2nd Stage Supply (VD2) 3rd Stage Voltage (VD3) Reference Voltage (VREF) Negative Supply (VSS) Operating Temperature MIN 925 0 0 0 0 0 -7 -30 TYP +8.5 +8.5 +8.5 +5 -3 MAX 960 +14 +9 +9 +9 +7 -2.7 +85 UNIT MHz dB m V DC V DC V DC V DC V DC C
The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications.
Data Sheet - Rev 2.0 09/2003
3
AWT921 Table 4: Electrical Specifications (1) ( Pin = +12dBm, fo = 925-960 MHz, Vds1=Vds2=Vds3=8.5V, VSS = -5 V, VREF = +25 V, VDD = +5 V, TC = +25 C, 50 system(2) )
PARAMETER Frequency Power Output Power Added Efficiency Gain @POUT = +39 dBm @POUT = +30 dBm Harmonics 2nd 3rd 4th
(3)
SYMBOL fo POUT EFF
MIN 925 -
TYP +39 40 27 31 37 47 50
MAX 960 -
UNIT MHz dB m %
PG
dB
dB c VSWR load, all phase angles mA
Stability: -60 dBc all spurious outputs relative to desired signal
-
-
3:1
-
Bias Supply Currents
I SS I REF I DD IDQ1 IDQ2 IDQ3 PG
10 0.5 0.5 -
8 1.2 8 100 250 200 4.5
-
Quiescent Currents Input Return Loss Gain Flatness @ POUT = +39dBm @ POUT = +30 dBm Thermal Resistance
(4)
mA dB
dB C/W
Notes: (1) As measured in ANADIGICS test fixture, see application section. (2) 50 Measurement system after off chip matching circuit, input terminated in 50 . (3) Measured at POUT =+ 39 dBm. (4) Thermal resistance for junction to bottom of slug. jc = (Tj-Tc)/((ID1+ID2 +ID3)*VSUP - POUT)
4
Data Sheet - Rev 2.0 09/2003
AWT921
PERFORMANCE DATA
Figure 3: Output Power and Power Added Efficiency vs. Pin
40 100
Figure 4: Output Power and Power Added Efficiency vs. Frequency
43 42 60 50 40 30 20 10 0 960
38
80
41
Pout (dBm)
Pout (dBm)
PAE (%)
36
60
40 39 38 37 36
34
40
32
20
30 0.0 2.0 4.0 6.0 8.0 10.0 12.0
0 14.0
35 920
925
930
935
940
945
950
955
Pin (dBm) Pout PAE
Freq (MHz) Pout PAE
Figure 5: Output Power and PAE vs. Supply Voltage
41 40 60.0 50.0 40.0 30.0 20.0 10.0
Figure 6: Third Stage Quiescent Current vs. Reference Voltage with Various RREF
700 600
Pout (dBm)
PAE (%)
39 38 37 36
Pout (dBm) Idq3 (mA)
500 400 300 200 100 0 0 1 2 3 4 5 6 7 8 9
Vds1=Vds2=Vds3
35 5 6 7 8 9 10 11 0.0
Supply Voltage (V) Pout PAE
Vref (V) Rref=1.5KOhms Rref=3KOhms Rref=6KOhms
150
Figure 7: Third Stage Quiescent Current vs. VDD, RREF = 1.8 KW
500 450 400
Figure 8: Third Stage Quiescent Current vs. VSS, RREF = 1.8 KW
Idq3 (mA)
Idq3 (mA)
100
350 300 250 200 150 100 50
50
0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0
0 -7 -6 -5 -4 -3 -2 -1
Vdd (V) Idq3
Vss (V) Idq3
Data Sheet - Rev 2.0 09/2003
5
AWT921
Figure 9: Small Signal Gain, Saturated Power, and Efficiency vs. Temperature
40 38
Pout (dBm), Gain (dB)
60 50
Figure 10: Third Stage Quiescent Current, Reference Current vs. Temperature
450 400 2.5 350 300 250 1.5 200 150 100 1 0.5 50 0 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 0 2 3
Iq3 (mA)
34 32 30 28 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Temperature (C) Pout SS Gain PAE
30 20 10 0
Temperature (C) Iq3 Iref
Figure 11: Test Circuit Impedance Presented to the First Stage Drain (Vd1)
S11 FORWARD REFLECTION IMPEDANCE .5 1 2 1 2 CH-1 S11 REFERENCE PLANE 16.2900 cm MARKER 1 0.926500000 GHz 8.126 114.075 j 5 MARKER TO MAX MARKER TO MIN 2 0.959750000 GHz 9.834 126.385 j
Figure 12: Test Circuit Impedance Presented to the Second Stage Drain (Vd2)
S11 FORWARD REFLECTION IMPEDANCE .5 1 2 S11 CH-1 REFERENCE PLANE 16.2900 cm MARKER 1 0.926500000 GHz 16.486 181.822 j 5 MARKER TO MAX MARKER TO MIN 2 0.959750000 GHz 19.628 205.440 j
1
2
.2
.2
0
.2
.5
1
2
5
0
.2
.5
1
2
5
-.2
-5
-.2
-5
-.5
-2
-.5
-1 0.100000000 2.000000000 GHz MARKER READOUT FUNCTIONS
-2 MARKER READOUT FUNCTIONS
-1 0.100000000 2.000000000 GHz
Figure 13: Test Circuit Impedance Presented to the Third Stage Drain (Vd3)
S11 FORWARD REFLECTION IMPEDANCE .5 1 2 S11 CH-1 REFERENCE PLANE 16.2900 cm MARKER 1 0.926500000 GHz 3.233 -1.131 j .2 5 MARKER TO MAX MARKER TO MIN 2 0.959750000 GHz 3.045 -344.163 jm
21 0 .2 .5 1 2 5
-.2
-5
-.5 -1 0.100000000 2.000000000 GHz
-2 MARKER READOUT FUNCTIONS
6
Data Sheet - Rev 2.0 09/2003
Iref (mA)
36
40
PAE (%)
AWT921
APPLICATION INFORMATION
F2 C1
L2 C19
F1 C5 C6 RFIN
L3 C4
9 10 5 6 4 7 8
AWT921S11
VD2 VD1 RFIN GND VD3 25 24 23 22 21 20 19 18 VREF VDD VSS GND VG1 VG2 VG3 2 13 16 17
C17 C13 L1 R4 R1 C11 R2 C12 F3 F4
RF OUT
RREF VD2 VD1 VDD/VREF VSS VG3 VD3 GND
SLUG 1 14 15 28
C7 C8
11 3 12
C15
C14
C10
C9
C16
Figure 14: Application Circuit Schematic
Table 5: Application Circuit Component Values (925-960 MHz GSM Application)
DESIGNATION R1 R2 RREF C 1, C 5, C 16 C 4, C 15, C 19 C 6, C 17 C 7, C 8, C 9, C 12
VALUE 7500 2.2 K 1.8 K 2.2 F 33 pF 47 pF 0.01 F
DESIGNATION C10, C11 C 13 C 14 L1 L2 L3 F 1, F 2, F 3, F 4,
VALUE 2700 pF 11 pF 4700 pF 8 nH Colicraft, A03T 12 nH 6 nH Ferrite 47 @ 100 MHz, 1A Rating Taiyo Yuden, BK2125HS470
7
Data Sheet - Rev 2.0 09/2003
AWT921
PACKAGE OUTLINE
Figure 15: S11 Package Outline - 28 Pin SSOP 28 Thermal Slug Package
Figure 16: Branding Specification 8
Data Sheet - Rev 2.0 09/2003
AWT921
COMPONENT PACKAGING
Figure 17: Tape & Reel Drawing
Table 6: Tape & Reel Dimensions
PACKAGE TYPE SSOP-28 WIDE BODY TAPE WIDTH 0.630 INCHES POCKET PITCH 0.472 INCHES REEL CAPACITY 3500 MAX REEL DIA 13 INCHES
Data Sheet - Rev 2.0 09/2003
9
AWT921
NOTES
10
Data Sheet - Rev 2.0 09/2003
AWT921
NOTES
Data Sheet - Rev 2.0 09/2003
11
AWT921
ANADIGICS, Inc.
141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com E-mail: Mktg@anadigics.com IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a product's formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited.
12
Data Sheet - Rev 2.0 09/2003


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